Yea, I should have seen this error coming. I was actually trying to look up where I could used 'open' because I didnt think I could use it for outputs and inputs. Looks like I was right.
This is caused from putting 'open' on an input port. You can only do that on output ports, for input ports you can make a dummy signal which will be synthesized out:
http://www.xilinx.com/support/answers/18415.htm
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