Wednesday, July 23, 2014

FPGA configuration encountered errors. Program FPGA failed

In this case the solution was actually simple. The console window was actually displaying something like this:

The following sections did not fit into Processor BRAM memory:
Section .jcr (0x88000944 - 0x88000947)
Section .eh_frame (0x88000940 - 0x88000943)
Section .data (0x88000830 - 0x8800093F)
Section .rodata (0x88000814 - 0x88000829)
Section .dtors (0x8800080C - 0x88000813)
Section .ctors (0x88000804 - 0x8800080B)
Section .fini (0x880007E8 - 0x88000803)
Section .init (0x880007B4 - 0x880007E7)
Section .text (0x88000000 - 0x880007B3)
Try using the linker script generation tools to generate an ELF that maps
correctly to your hardware design.

Which is a common error. Normally you can just make the BRAM larger in the EDK and regenerate. If it is still not working other things to try:

Booting from somewhere else:
 http://www.xilinx.com/support/answers/43414.htm
Turning off ELF check if the ELF is too large:
http://www.xilinx.com/support/answers/38178.html
Completely deleting Linker Script and regenerating:
http://forums.xilinx.com/t5/Embedded-Development-Tools/elfcheck-failed/td-p/307699
"It looks like it's still trying to place the data and code into your BRAM.  Double check your linker script generation and manually delete the .ld file before rebuilding the workspace."







Friday, July 18, 2014

Failed to connect to Xilinx hw_server

Program FPGA failed

Reason:

   Failed to connect to Xilinx hw_server. Check if the hw_server is running and correct TCP port is used.

http://www.xilinx.com/support/answers/55431.htm

hw_server is used with the TCF infrastructure for debugging and it only supports Digilent and has to be launch manually from a shell.

The 'Auto Detect' option always chooses the TCF flow when the Digilent cable is plugged in.

If you do not want to use the TCF infrastructure, you must change the JTAG cable pull-down menu from Auto Detect to 'Digilent USB Cable' and resolve the error.

This change is found from SDK's Xilinx Tools -> Configure JTAG Settings. Again, changing from Auto Detect to Digilent USB Cable resolves the issue.

Thursday, July 10, 2014

Editing Telemetry Packets for Vector File Testbench in Word

So I you have a packet that looks like this:

AA BB CC DD  11 22 33 44

And you need it to be in a vector read-in format for the simulator

AA
BB
CC
DD
11
22
33
44

You can actually use word find and replace. In this case replace any Two space with just one. And then replace all spaces with ^l

You can also find this setting under the "Special Characters" Button at the bottom of the Find and Replace Menu.

Also note you can use CTRL+SHIFT+8 to see the editing special characters