Thursday, November 6, 2014

Xilinx SDK Running .elf on the DDR

So I was having problems with this earlier.

The program I was running was too big to fit in the BRAM:

ERROR:EDK:3165 - elfcheck failed!
The following sections did not fit into Processor BRAM memory:
 Section .data (0x420109C0 - 0x42012587)
 Section .rodata (0x4200FF10 - 0x420109BB)
 Section .dtors (0x4200FF08 - 0x4200FF0F)
 Section .ctors (0x4200FF00 - 0x4200FF07)
 Section .fini (0x4200FEE0 - 0x4200FEFF)
 Section .init (0x4200FEA4 - 0x4200FEDF)
 Section .text (0x42000000 - 0x4200FEA3)

Try using the linker script generation tools to generate an ELF that maps
correctly to your hardware design.

 So That is kind of annoying, you now have two options, either 1) make the bram bigger or 2) run it in the DDR

I found the following posts, all kind of describing what was needed to run it in the DDR.
  1. Link1
  2. Link2
  3. Link3

Here is what worked for me:

  1. Make sure to generate a new linker with everything in the DDR
  2. Program the system.bit and system.bmm with the "Program FPGA" button, make sure that for the "software configuration" that "bootloop" is selected
  3. Open the XMD with Xilinx Tools >  XMD Console 
  4. when it opens you should have seen a programming FPGA status line: "Fpga Programming Progress....10......etc
  5. Type in the following commands
For the Power PC

connect ppc hw  
cd "c:\Location_to_your_software_debug_folder"
dow "your_elf_file" 
con

remember that if the processor is acting weird you can always do a
connect ppc hw; stop; rst -processor

then continue on from dow

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