Skyrim Dawnguard 3rd Person Crossbow Animation Not Working

So a huge amount of disappointment today when I discovered my game seemed to glitch when I tried to fire the crossbow in 3rd person. Super lame.

At first I was really mad at Bethesda for making it so glitchy, but then I realized it is only really glitchy because of all my freaking mods.

To get it to work I ended following the steps here: http://skyrimforums.org/threads/dawnguard-crossbow-glitch.13637/

1) FNIS (RE-)INSTALLATION fix (should work in most cases):
- remove data/meshes/actors/character/behaviors/mt_behavior.hkx
- (re-)install Fore's New Idles in Skyrim - FNIS. Make sure GenerateFNISforUsers.exe is run
FNIS will overwrite the most common cause of animation glitches (due to old defaultmale.hkx, and defaultfemale.hkx)

2) BEHAVIOR CLEAN-UP:
delete the following files, or move them to a different folder:
- data/meshes/actors/character/*.hkx
- data/meshes/actors/character/behaviors/*.hkx
- data/meshes/actors/character/characters/defaultmale.hkx 
- data/meshes/actors/character/characters female/defaultfemale.hkx
Now of course all animation mods which need behavior files need to be re-installed

Now it works just fine and I am having a great time with it.

[NgdBuild 1037] The logic for imported Partition using previous implementation has been modified. This situation can occur when the source for the Partition was modified but the Partition was not re-implemented and exported. You must re-implement and export the Partition before it can be imported into this design.

This error is soooo obscure it is crazy.

All you have to do is close and reopen the synthesized design view:

http://www.xilinx.com/support/answers/41889.htm

NgdBuild 1407 BUFG 'pin_name' cannot be route through Reconfigurable Partition 'reconfiguarable_partition_instance'. Partition output pin 'pin_name' must be driven by logic internal to the partition.

So this super obscure error is caused by having a clk routed within a PR region. I found an AR record that discussed this here (http://forums.xilinx.com/t5/Design-Planning/Partition-output-pin-BramClk-must-be-driven-by-logic-internal-to/td-p/171508):

The basic idea is do not have a clock as an output. You will get this error if you EVER have a clock that is an output but is not connected at some point, like chained reconfigurable regions.

Find Account Information and Redeem Codes on PSN Network

I am posting this because that website is so fucking unintuitive it takes me several minutes every time I visit to figure out what the hell is going on.

1. Sign on to your account at us.playstation.com
2. Click on "My Account"
3. Click the small text that says "Manage Sony Entertainment Network Account"
4. Sign in again on the page it takes you to

From there you have access to the following things 

1. Redeem Codes 
2. Add Funds to Wallet 
3. Manage your Sub Accounts 
4. View Your transaction history

Damn Sony, I really love my Vita, but make that website better.

To Add funds to the Sub Account
You actually just add funds to your account and set a limit on the Sub

ERROR:HDLParsers:856 - No default value for unconnected port

Yea, I should have seen this error coming. I was actually trying to look up where I could used 'open' because I didnt think I could use it for outputs and inputs. Looks like I was right.

This is caused from putting 'open' on an input port. You can only do that on output ports, for input ports you can make a dummy signal which will be synthesized out:

http://www.xilinx.com/support/answers/18415.htm

INFO:Xst:2261 - The FF/Latch XXX in Unit XXX is equivalent to the following XXX FFs/Latches, which will be removed

I got this error the other day and it really caused me a lot of frustration. I was only building a simple core too.
Anyway I found this AR which would lead me to solving it http://www.xilinx.com/support/answers/38239.htm

I was frustrated because I could synthesize the lower blocks with no trouble, but the second I put them all into a top level it synthesized half the design away.

The bottom line is a lot of my logic was synthesized out and I am unhappy. Turns out it had to do with my output and I was connecting it to the wrong place because the controller basically would need the output from a different signal.

the TLDR: If You get this you messed up your logic, possibly in a top level because of a sm controller

ERROR:HDLParsers:812 A Value is missing in case

If you get the following error:

ERROR:HDLParsers:812 - "file_name" Line ###. A value is missing in case.

The first reason is covered by the AR record http://www.xilinx.com/support/answers/14430.htm

This just means you forgot to add when others => to your case statement. The other way to solve this is really freaking weird but I ran into this in ISE 13.2

 when "11" =>      
      TOKEN<= "0000";                
    --synthesis translate_off
    when others =>
      null;
    --synthesis translate_on

Also caused this error, unbelievably just moving the commends down after the when others solves it

 when "11" =>      
      TOKEN<= "0000";                
 when others =>
      null;
     --synthesis translate_off
    --synthesis translate_on