Xilinx running someone else's SDK Project

Recently, I had a problem with someone giving me an SDK project.

Here are some useful steps to getting their crap to work

1. Make sure you have your license server on or the bsp will not build
2. If the bsp does not build create a new "Hello World" project and BSP
3. Go to Xilinx Tools > "Repositories" and add in their custom MyProcessorIPLib to nab their drivers
4. Right click on the BSP and "Board Support Package Settings" Make sure the Correct "Supported Libraries" are checked off 
5. Click on the "Drivers" tab and make sure all the correct drivers are loaded instead of the generic 
6. Copy over their source files 
7. Rebuild the project

printf & xil_printf statements break when printing values

I was doing some dev work on the ML507 and I kept running into this problem where the printf statements would not print variables using stuff like %08x and %d etc...

Turns out I needed to change the size of the stack and heap to 0x2000 from 0x400.

more of this error detailed here: Link!

lscript.ld:228 cannot move location counter backwards

 I ran into this and had absolutely no freaking clue what the hell was going on.
 
**** Build of configuration Debug for project spw_int_test ****

make all
Building target: spw_int_test.elf
Invoking: PowerPC gcc linker
powerpc-eabi-gcc -Wl,-T -Wl,../src/lscript.ld -L../../hello_world_bsp_0/ppc440_0/lib -mcpu=440 -mfpu=dp_full -o"spw_int_test.elf"  ./src/helloworld.o ./src/platform.o ./src/spacewire_driver.o  
../src/lscript.ld:228 cannot move location counter backwards (from fffff170 to 00000170)
collect2: ld returned 1 exit status
make: *** [spw_int_test.elf] Error 1

I ended up finding a solution here Link

Simply Change the stack and heap size to 0x400!

Xilinx SDK Processor Folder with Includes Dissapears from BSP!

So, Just as a quick reference, if your BSP does not seem to be building the files for the processor and the normal things you have in the include folder, one of the reasons this happened to me is I was remoted in and lost connection to the license server

Hilarious Xilinx Capitalization Error

So funny story, ran into this crazy xilinx error:

ERROR:EDK - IPNAME:[IPName] INSTANCE:IPNAME_0 - C:\Users\[location]\l.srcs\sources_1\edk\module_1\dump.mhs line 518 - Invalid ip name. IP name cannot have upper case characters.





This is that your actual IP core name cannot have any capital letters when you actually use the peripheral creation wizard. GAH!

14.7 PlanAhead - [Constraints 18-5] Cannot loc terminal "XX_n" at site XX; loc is blocked

So this is a pretty annoying error. The solution is detailed

here:AR# 43315

and here also discusses it: Xilinx Forums

Under the [Project Manager] on the Left side of plan ahead, go to "Implementation Settings"

Under the Section for [Translate (ngdbuild)]  go to "More Options*" and type in:

-uc filelocation

^ use forward slashes / for the location like C:/Users/Xilinx/system.ucf

You MUST remove the constraints file from the project too to get the warnings to disappear.

Error Launching PTC Windchill Quality Solution

Error:

Could not connect to net.tcp://[host]:[port]/Relex.Security/IAccessManager. The connection attempt lasted for a time span of ##:##:##.#######. TCP error code 10061: No connection could be made because the target machine actively refused it.

When I was googling around for this error all I could get were comments on SQL server. The solution is to restart some PTC services that have been turned off: